# pins

ball: A12
ball_name: NC
created_at: 2025-06-21 17:35:05
updated_at: 2025-06-21 18:09:05
function: NC
remarks:
Supply: NC (i.MX 6DualLite) - These signals are not functional and must remain unconnected by the user.; Supply: NC (i.MX 6Solo) - These signals are not functional and must remain unconnected by the user.


ball: F9
ball_name: VDDUSB_CAP
created_at: 2025-06-21 17:35:05
updated_at: 2025-06-21 18:05:46
function: POWER
remarks:
Supply: VDDUSB_CAP - Secondary supply for the 3 V Domain (internal regulator output—requires capacitor if internal regulator is used)  


ball: G9
ball_name: VDD_SNVS_CAP
created_at: 2025-06-21 17:35:05
updated_at: 2025-06-21 18:05:46
function: POWER
remarks:
Supply: VDD_SNVS_CAP - Secondary supply for the SNVS (internal regulator output—requires capacitor if internal regulator is used)


ball: H10
ball_name: VDDHIGH_CAP
created_at: 2025-06-21 17:35:05
updated_at: 2025-06-21 18:05:46
function: POWER
remarks:
Supply: VDDHIGH_CAP - Secondary supply for the 2.5 V domain (internal regulator output—requires capacitor if internal regulator is used)


ball: H11
ball_name: VDDARM_CAP
created_at: 2025-06-21 17:35:05
updated_at: 2025-06-21 18:05:46
function: POWER
remarks:
Supply: VDDARM_CAP - Secondary supply for core (internal regulator output—requires capacitor if internal regulator is used)


ball: H17
ball_name: VDDPU_CAP
created_at: 2025-06-21 17:35:05
updated_at: 2025-06-21 18:05:46
function: POWER
remarks:
Supply: VDDPU_CAP - Secondary supply for VPU and GPUs (internal regulator output—requires capacitor if internal regulator is used)


ball: R10
ball_name: VDDSOC_CAP
created_at: 2025-06-21 17:35:05
updated_at: 2025-06-21 18:05:46
function: POWER
remarks:
Supply: VDDSOC_CAP - Secondary supply for SoC and PU regulators (internal regulator output—requires capacitor if internal regulator is used)


ball: AE17
ball_name: ZQPAD
created_at: 2025-06-21 17:35:05
updated_at: 2025-06-21 18:22:32
function: DRAM
remarks:
Supply: ZQPAD - Connect ZQPAD to an external 240 Ω 1% resistor to GND. This is a reference used during DRAM output buffer driver calibration.


